1. Field of the Invention
The present invention relates to a hybrid integrated circuit device having circuit elements formed and mounted on a circuit substrate. More particularly, the present invention is intended to provide a standerdizable small-size dense hybrid integrated circuit device adopted for surface mounting. The present invention also relates to a method for manufacturing such a hybrid integrated circuit device.
2. Description of the Related Art
In electronic installations represented by information processing devices, the expansion of the field of application and increase of the quantities of information to be processed, make a further increase of the function, capacity, and operation speed necessary.
To satisfy this requirement, an increase of the integration degree and operation speed in semiconductor devices and an improvement of the assembling technique for reducing the wiring length and increasing the packaging density in devices are effective and important.
As means for increasing the packaging density in devices, there have been broadly adopted a chip-on-board method such as a flip chip, wire bonding or film carrier, in which a bare chip is directly mounted on a wiring substrate, and a method in which a surface package part having a small size such as a leedless carrier of flat package is used.
According to this high-density packaging technique, circuit elements such as wirings are formed on a circuit substrate and individual circuit elements are mounted to construct a hybrid integrated circuit having a high density, and hybrid integrated circuits having a high capacity and high performance have been produced by utilizing this packaging technique.
In hybrid integrated circuits, efforts have been made to increase the wiring density by adopting a multi-layer forming technique and a fine patterning technique, but a prominent effect cannot be attained by a wiring method or structure utilizing only one of the thick film forming technique and the thin film forming technique.
FIG. 1 is a sectional side view illustrating an example of the structure of a hybrid integrated circuit according to the conventional technique, and FIG. 2 is an enlarged sectional side view illustrating an electrode for connection of an external lead terminal of the hybrid integrated circuit shown in FIG. 1.
Referring to FIG. 1, circuit elements are formed on both surfaces of a circuit substrate and are connected by through holes in a hybrid integrated circuit 1. More specifically, this conventional hybrid integrated circuit 1 comprises a circuit substrate 2 having a plurality of through holes 3, and circuit elements 4 composed of wirings and circuit parts having a film structure are formed on the upper and lower surfaces of the circuit substrate 2, discrete circuit elements 5 are then mounted, an outer lead terminal 6 having an end portion gripped on the circuit substrate 2 is connected, a ceramic cap 10 is mounted, and a resin outer casing 7 is disposed to complete the manufacturing process.
Where a circuit element 5 is a bare chip 5a, in order to protect the bare chips 5a and fine metal wires 8 connected to the bare chips 5a, a coating resin is potted to form a protecting layer 9, before attachment of the outer casing 7.
If, as shown in FIG. 2, the circuit element 4 is a thick-film multi-layer wiring and an electrode 11 to which the outer lead terminal 6 is connected is a laminate comprising a conductor layer 4a covered on the circuit substrate 2 and a conductor layer 4b formed in the upper portion of the circuit element 4, the conductor layer 4b is formed in the step portion formed in the vicinity of the conductor layer 4a.
When manufacturing this hybrid integrated circuit 1, circuit elements 4 are formed by either the thick film-forming method or the thin film-forming method on an insulating plate, such as an alumina ceramic plate, having a large such size that a plurality of circuit substrates 2 can be taken out.
The ceramic plate is then divided into individual substrates 2, the desired circuit elements 5 are mounted, and the protecting layer 9 is covered on the predetermined mounted circuit element 5a (for example, the bare chip). Then, the outer lead terminal 6 is connected and the outer casing 7 is attached, and thus the manufacturing process is completed.
In the formation of circuit elements, with respect to the thick film-forming method based on the screen printing technique, fine pattern printing and wiring of both surfaces using through holes are utilized for improving the packaging density in the multi-layer wiring.
The thick film-forming method and thin film-forming method for forming circuit elements have peculiar advantages, respectively, but these methods have technical limits and cannot further improve the packaging density in a hybrid integrated circuit.
More specifically, since the thick film-forming method uses a conductive paste having a high viscosity, the width of the fine pattern is limited to about 100 .mu.m or more, and the diameter of the through hole should be at least 0.3 mm even when made by suction printing. Accordingly, it is difficult to stably form fine resistor elements having a size smaller than 0.5 mm .times. 0.5 mm over a broad range, and therefore, the wiring region is broadened and an increase of the packaging density is impossible.
Generally, the protecting layer 9 for protecting the bare chip 5a or the like is formed by casting a thermosetting liquid resin and curing the resin by heating. The liquid resin flows around the bare chips 5a and the protecting layer 9 then has an expanded skirt-like shape. Accordingly, if, for example, a bare chip 5a is arranged in the vicinity of the peripheral edge of the substrate 2 and the skirt of the protecting layer 9 covers the dividing line for dividing the above-mentioned large ceramic plate into circuit substrates, the division becomes difficult.
The conventional outer lead terminal 6 extends straight in the sideway from the connecting point to the substrate 2 and the terminal 6 is often broken at the connecting portion to the substrate by an external force applied to the portion extending from the outer casing 7. In the circuit element formed by utilizing the thick film-forming method, if the height of the step between the conductor layer 4b connected to the conductor layer 4a for connection of the outer lead terminal and the conductor layer 4a exceed several tens of .mu.m, the conductor layer 4b is often cut at this step portion.
A substrate for a hybrid integrated circuit has been proposed, in which a digital circuit is formed on one main surface of the substrate by a thick film-forming method and an analog circuit is formed on the other main surface of the substrate by a thin film-forming method (Japanese Unexamined Patent Publication (kokai) No. 60-21589). This is intended only to provide a design of a substrate adopted for each digital and analog circuit, and does not provide a method for making through holes suitable for allowing a hybrid integrated circuit to be as dense as that according to the present invention. This substrate is ground or glazed to provide a smooth surface suitable for a thin film circuit to be formed thereon, but such a substrate is practically not suitable for a thin film circuit or a later process incorporating a high temperature treatment. Discrete parts are mounted on the substrate, by soldering only, which does not allow the hybrid integrated circuit to be made dense. And finally, this proposal does not allow the hybrid integrated circuit to be encapsulated by transfer molding, for which the area of the substrate must be less than about 1.5 cm by about 1.5 cm.
Also proposed is s substrate for a hybrid integrated circuit in which a thick film pattern is formed on a main surface of the substrate and a thin film pattern is formed on the other main surface of the substrate, the other main surface of the substrate being ground (Japanese Unexamined Publication (Kokai) No. 60-201688). This suffers from the same problems as in the above proposal.
There is further proposed a method for manufacturing a ceramic substrate, comprising forming holes in the ceramic plate by supersonic or laser beam, nonelectroless plating the substrate followed by electrolytic plating, and selectively etching the plating layer (Japanese Unexamined Patent Publication (kokai) No. 59-159592). In this method, not only the surface of the through holes but also both main surfaces of the substrate are roughened before plating. This means that the substrate is not suitable for forming a thin film circuit thereon. Although not mentioned, laser drilling of a ceramic plate has been carried out by a CO.sub.2 laser having a high power in the prior art, and the CO.sub.2 laser gives a relatively large size hole, such as more than 0.3 .mu.m. Even if the CO.sub.2 laser beam is converged to an area with a small diameter, control of the diameter is difficult due to a long wavelength of the CO.sub.2 laser light, resulting in an undesirable shape of the holes formed in the ceramic plate.